Quantum Computing: A pathway to quantum logic design, 2nd Edition

PRELIMS.pdf Preface to the Second Edition Acknowledgments Author biography Dr Hafiz Md Hasan Babu Acronyms CH001.pdf Outline placeholder An overview of quantum circuits Chapter 1 Quantum logic 1.1 Overview 1.2 Motivations towards quantum computing 1.3 The relationship between reversible and quantum logic 1.4 Quantum computers 1.5 The working principles of quantum computers 1.6 The evolution of quantum computers 1.7 Why pursue quantum computing? 1.8 Summary Critical thinking questions References CH002.pdf Chapter 2 Basic definitions of quantum logic 2.1 The quantum qubit 2.2 The quantum gate 2.2.1 The quantum Feynman gate 2.2.2 The quantum Tofolli gate 2.2.3 The quantum Fredkin gate 2.3 Garbage outputs 2.4 Constant inputs 2.5 Area 2.6 Power 2.7 Delay 2.8 Depth 2.9 Quantum cost 2.10 Quantum gate calculation complexity 2.11 Summary Critical thinking questions References CH003.pdf Chapter 3 The quantum qubit string comparator 3.1 Characteristics of a quantum comparator 3.2 The quantum magnitude comparator 3.3 The design of a quantum comparator Guess 3.3.1 Example 3.4 Summary Critical thinking questions References CH004.pdf Chapter 4 The quantum full-adder and subtractor 4.1 The quantum adder 4.1.1 The quantum full-adder 4.2 The quantum subtractor 4.2.1 The quantum half-subtractor 4.2.2 The quantum full-subtractor 4.3 Summary Critical thinking questions References CH005.pdf Chapter 5 The quantum multiplexer and demultiplexer 5.1 The quantum multiplexer 5.1.1 The quantum 2-to-1 multiplexer 5.1.2 Quantum 4-to-1 multiplexer 5.1.3 The quantum 2n-to-1 multiplexer 5.2 The quantum demultiplexer 5.2.1 The quantum 1-to-2 demultiplexer 5.2.2 The quantum 1-to-4 demultiplexer 5.2.3 Quantum 1-to-2n demultiplexer 5.3 Summary Critical thinking questions References CH006.pdf Chapter 6 The quantum adder circuits 6.1 The quantum carry skip adder 6.2 The quantum comparison circuit 6.3 The quantum 2-to-1 multiplier circuit 6.4 The design of a quantum carry skip adder 6.4.1 The four-qubit quantum carry skip adder 6.4.2 The n-qubit quantum carry skip adder 6.4.3 Calculation of the area and power of a quantum carry skip adder circuit 6.4.4 Complexity of the n-qubit quantum carry skip adder circuit 6.5 The quantum BCD adder 6.6 Summary Critical thinking questions References CH007.pdf Chapter 7 The quantum multiplier–accumulator 7.1 The importance of a quantum multiplier–accumulator 7.2 The quantum multiplication technique 7.3 Reduction of the garbage outputs and ancillary inputs of quantum circuits 7.4 The design of a quantum multiplier circuit 7.4.1 The quantum ANDing circuit 7.4.2 The quantum full-adder circuit 7.4.3 The n × n-qubit quantum multiplier 7.5 Accumulator 7.6 Summary Critical thinking questions References CH008.pdf Chapter 8 The quantum divider 8.1 Division algorithms 8.1.1 Classical integer division algorithms 8.1.2 Quantum integer division algorithms 8.2 The importance of the quantum divider 8.3 The tree-based quantum division technique 8.3.1 Definitions and properties of the division technique 8.3.2 The algorithm of the division technique 8.4 The design of a quantum divider circuit 8.4.1 A technique to minimize the number of ancillary inputs in the quantum circuit realization 8.4.2 The components of the quantum divider circuit 8.5 Summary Critical thinking questions References CH009.pdf Chapter 9 The quantum BCD priority encoder 9.1 The properties of a quantum encoder 9.2 The design of a quantum BCD priority encoder circuit 9.2.1 The quantum BCD priority encoder circuit 9.2.2 Analysis of the properties of the encoder circuit 9.3 Summary Critical thinking questions References CH010.pdf Chapter 10 The quantum decoder 10.1 The characteristics of a quantum decoder 10.2 The design of a quantum decoder 10.2.1 The quantum decoder circuit 10.2.2 Analysis of the properties of the circuits 10.3 Summary Critical thinking questions References CH011.pdf Chapter 11 The quantum square root circuit 11.1 The properties of a quantum square root function 11.2 The design of a quantum square root circuit 11.2.1 The quantum adder/subtractor circuit 11.2.2 The quantum square root circuit 11.2.3 Analysis of the properties of the quantum circuit 11.3 Summary Critical thinking questions References CH012.pdf Chapter 12 Quantum latches and counter circuits 12.1 The properties of quantum latches 12.2 The design of quantum latches 12.2.1 The quantum SR latch 12.2.2 The quantum D latch 12.2.3 The quantum T latch 12.2.4 The quantum J–K latch 12.3 The properties of quantum counter circuits 12.4 The design of quantum counters 12.4.1 The quantum asynchronous counter 12.4.2 The quantum synchronous counter 12.5 Summary Critical thinking questions References CH013.pdf Chapter 13 The quantum controlled ternary barrel shifter 13.1 Ternary quantum gates 13.1.1 The quantum ternary Peres gate 13.1.2 The quantum ternary modified Fredkin gate 13.2 The properties of ternary quantum circuits 13.3 The quantum barrel shifter 13.3.1 Logical right shift 13.3.2 Arithmetic right shift 13.3.3 Right rotation 13.3.4 Logical left shift 13.3.5 Arithmetic left shift 13.3.6 Left rotation 13.4 The design of a quantum ternary barrel shifter 13.4.1 The optimized quantum ternary barrel shifter 13.4.2 The properties of the designed circuit 13.5 Summary Critical thinking questions References CH014.pdf Chapter 14 Quantum RAM, quantum ROM, and quantum cache memory 14.1 The quantum n-to-2n decoder 14.2 The quantum memory unit 14.3 The construction procedure of QRAM 14.4 Quantum ROM 14.5 Quantum cache memory 14.6 Summary Critical thinking questions References CH015.pdf Chapter 15 The quantum arithmetic logic unit 15.1 The design of a quantum ALU 15.1.1 The first approach 15.1.2 The second approach 15.1.3 The third approach 15.2 Summary Critical thinking questions References CH016.pdf Chapter 16 Quantum programmable logic devices 16.1 The quantum programmable array logic 16.1.1 The design procedure and working principles of quantum PAL 16.1.2 The importance and applications of quantum PAL 16.2 The quantum programmable logic array 16.2.1 The design procedure and working principles of quantum PLAs 16.2.2 The importance and applications of quantum PLAs 16.3 The quantum complex programmable logic device 16.3.1 The design procedure and working principles of quantum CPLDs 16.3.2 The importance and applications of quantum CPLD 16.4 The quantum field-programmable gate array 16.4.1 The design procedure and working principles of quantum FPGAs 16.4.2 The importance and applications of FPGAs 16.5 Summary Critical thinking questions References CH017.pdf Chapter 17 The quantum processor circuit 17.1 Introduction 17.2 Basic definitions 17.3 The block diagram of a quantum processor 17.4 The basic components of a quantum processor 17.4.1 The quantum RAM 17.4.2 The quantum instruction register 17.4.3 The quantum program counter 17.4.4 The quantum decoder 17.4.5 The quantum multiplexer 17.4.6 The quantum arithmetic logic unit 17.4.7 The quantum accumulator 17.5 Applications 17.6 Summary Critical thinking questions References CH018.pdf Chapter 18 Applications of quantum computing technology 18.1 Optimization 18.1.1 The Roswell Park Cancer Institute 18.1.2 Volkswagen group 18.1.3 Recruit Communications 18.2 Machine learning 18.2.1 QxBranch 18.2.2 Los Alamos National Laboratory 18.2.3 NASA 18.3 Biomedical simulations 18.4 Financial services 18.5 Computational chemistry 18.6 Logistics and scheduling 18.7 Cyber security 18.8 Circuit, software, and system fault simulation 18.9 Weather forecasting 18.10 Summary Critical thinking questions References CH019.pdf Outline placeholder An overview of quantum fault-tolerant circuits Chapter 19 Quantum fault-tolerant circuits 19.1 The need for quantum fault-tolerant circuits 19.2 The fault-tolerant quantum adder 19.2.1 The fault-tolerant full-adder 19.3 The fault-tolerant multiplier 19.3.1 The fault-tolerant signed multiplier 19.4 The quantum fault-tolerant integer divider 19.4.1 The restoring division algorithm 19.4.2 The subtractor module 19.4.3 The conditional addition operation module 19.4.4 Quantum restoring integer division circuitry 19.5 Summary Critical thinking questions References CH020.pdf Outline placeholder An overview of quantum-dot cellular automata Chapter 20 Quantum-dot cellular automata 20.1 Fundamentals of QCA circuits 20.1.1 Area 20.1.2 Delay 20.1.3 Kink energy 20.1.4 Power 20.1.5 Overall cost 20.2 The QCA cell 20.3 Information and data propagation 20.4 Basic QCA elements and gates 20.4.1 The QCA majority voter 20.4.2 The QCA AND gate 20.4.3 The QCA OR gate 20.4.4 The QCA NOT gate 20.4.5 The QCA wire 20.5 The QCA clock 20.5.1 Special cell arrangements and symmetric cells 20.5.2 The NOT gate clock zones 20.5.3 The majority voter clock zones 20.6 Summary Critical thinking questions References CH021.pdf Chapter 21 The QCA adder and subtractor 21.1 The Ex-OR gate 21.2 The QCA half-adder and -subtractor 21.3 The QCA full-adder and full-subtractor 21.3.1 Implementation of the full-adder and full-subtractor 21.4 Summary Critical thinking questions References CH022.pdf Chapter 22 The QCA multiplier and divider 22.1 The QCA multiplier 22.1.1 Multiplication networks 22.1.2 QCA multiplication networks 22.1.3 Multiplier design 22.2 The QCA divider 22.2.1 The non-restoring binary divider 22.2.2 Divider implementation 22.3 Summary Critical thinking questions References CH023.pdf Chapter 23 QCA asynchronous and synchronous counters 23.1 The asynchronous counter 23.1.1 The dual-edge triggered J–K flip-flop 23.1.2 The design of dual-edge triggered J–K flip-flop 23.1.3 The asynchronous backward counter 23.2 The synchronous counter 23.2.1 QCA synchronous counters 23.3 Summary Critical thinking questions References CH024.pdf Chapter 24 The QCA decoder and encoder 24.1 The QCA decoder 24.1.1 The QCA 2-to-4 decoder A. Calculation for AB B. Calculation for AB 24.1.2 The QCA 3-to-8 decoder 24.2 The QCA encoder 24.2.1 The QCA turbo encoder design 24.2.2 The RC encoder with single-feedback 24.2.3 The RC encoder with multi-feedback 24.3 Summary Critical thinking questions References CH025.pdf Chapter 25 The QCA multiplexer and demultiplexer 25.1 The QCA 2-to-1 multiplexer 25.2 The QCA 4-to-1 multiplexer 25.3 The QCA 1-to-2 demultiplexer 25.4 The QCA 1-to-4 demultiplexer 25.5 Multiplexing/demultiplexing using QCA 25.5.1 The effect of the selector line (S0,S1) on the 2-to-1 MUX/1-to-2 DEMUX 25.6 Summary Critical thinking questions References CH026.pdf Chapter 26 QCA flip-flops 26.1 QCA D flip-flops 26.2 QCA J–K flip-flops 26.3 QCA SR flip-flops 26.4 QCA T flip-flops 26.5 Applications 26.6 Summary Critical thinking questions References CH027.pdf Chapter 27 QCA programmable logic devices 27.1 The QCA programmable array logic 27.2 The QCA programmable logic array 27.3 The QCA field-programmable gate array 27.4 The importance and applications of QCA programmable logic devices 27.5 Summary Critical thinking questions References CH028.pdf Chapter 28 QCA RAM, ROM, and cache memory 28.1 The RAM cell 28.2 The QCA ROM 28.3 The QCA cache memory 28.4 Summary Critical thinking questions References CH029.pdf Chapter 29 The QCA processor circuit 29.1 Introduction 29.2 Basic definitions 29.3 The block diagram of a QCA processor 29.4 The basic components of a QCA processor 29.4.1 The QCA RAM 29.4.2 The QCA instruction register 29.4.3 The QCA accumulator 29.4.4 The QCA decoder 29.4.5 The QCA multiplexer 29.4.6 The QCA program counter 29.4.7 The QCA ALU 29.5 Summary Critical thinking questions References CH030.pdf Chapter 30 Applications of QCA technology 30.1 High performance 30.2 Small size 30.3 Low power consumption 30.4 Encryption and authentication 30.5 Higher data speed 30.6 Image processing 30.7 Summary Critical thinking questions References CH031.pdf Outline placeholder An overview of QCA fault-tolerant circuits Chapter 31 QCA fault-tolerant circuits 31.1 The necessity of QCA fault-tolerant circuits 31.2 The fault-tolerant QCA majority gate 31.3 The fault-tolerant QCA 1-to-2 demultiplexer 31.4 The fault-tolerant QCA full-adder 31.5 The fault-tolerant QCA SRAM cell 31.6 The fault-tolerant QCA subtractor 31.7 The fault-tolerant QCA multiplier 31.8 Summary Critical thinking questions References