Logic and Computer Design Fundamentals (4th Edition)

For one- to two-semester Computer Science and Engineering courses in logic and digital design. Featuring a strong emphasis on the fundamentals underlying contemporary logic design using hardware description languages, synthesis, and verification, this book focuses on the ever-evolving applications of basic computer design concepts with strong connections to real-world technology. Preface......Page 2 Chapter 1. Digital Systems and Information......Page 11 1-1 INFORMATION REPRESENTATION......Page 12 1-2 NUMBER SYSTEMS......Page 21 1-3 ARITHMETIC OPERATIONS......Page 26 1-4 DECIMAL CODES......Page 31 1-5 ALPHANUMERIC CODES......Page 33 1-6 GRAY CODES......Page 36 PROBLEMS......Page 39 2-1 BINARY LOGIC AND GATES......Page 43 2-2 BOOLEAN ALGEBRA......Page 47 2-3 STANDARD FORMS......Page 56 2-4 Two-LEVEL CIRCUIT OPTIMIZATION......Page 62 2-5 MAP MANIPULATION......Page 73 2-6 PRAGMATIC Two-LEVEL OPTIMIZATION......Page 80 2-7 MULTIPLE-LEVEL CIRCUIT OPTIMIZATION......Page 84 2-8 OTHER GATE TYPES......Page 89 2-9 EXCLUSIVE-OR OPERATOR AND GATES......Page 93 2-10 HIGH-IMPEDANCE OUTPUTS......Page 96 REFERENCES......Page 98 PROBLEMS......Page 99 3-1 DESIGN PROCEDURE......Page 105 3-2 BEGINNING HIERARCHICAL DESIGN......Page 112 3-3 TECHNOLOGY MAPPING......Page 115 3-4 VERIFICATION......Page 119 3-5 COMBINATIONAL FUNCTIONAL BLOCKS......Page 121 3-6 RUDIMENTARY LOGIC FUNCTIONS......Page 123 3-7 DECODING......Page 129 3-8 ENCODING......Page 135 3-9 SELECTING......Page 139 3-10 CHAPTER SUMMARY......Page 146 PROBLEMS......Page 148 Chapter 4. Arithmetic Functions and HDLs ......Page 157 4-1 ITERATIVE COMBINATIONAL CIRCUITS......Page 158 4-2 BINARY ADDERS......Page 159 4-3 BINARY SUBTRACTION......Page 163 4-4 BINARY ADDER-SUBTRACTORS......Page 167 4-5 OTHER ARITHMETIC FUNCTIONS......Page 175 4-6 HARDWARE DESCRIPTION LANGUAGES......Page 181 4-7 HDL REPRESENTATIONS-VHDL......Page 184 4-8 HDL REPRESENTATIONS-VERILOG......Page 195 REFERENCES......Page 204 PROBLEMS......Page 205 Chapter 5. Sequential Circuits......Page 215 5-1 SEQUENTIAL CIRCUIT DEFINITIONS......Page 216 5-2 LATCHES......Page 218 5-3 FLIP-FLOPS......Page 223 5-4 SEQUENTIAL CIRCUIT ANALYSIS......Page 230 5-5 SEQUENTIAL CIRCUIT DESIGN......Page 238 5-6 OTHER FLIP-FLOP TYPES......Page 255 5-7 STATE-MACHINE DIAGRAMS AND APPLICATIONS......Page 258 5-8 HDL REPRESENTATION FOR SEQUENTIAL CIRCUITS-VHDL......Page 272 5-9 HDL REPRESENTATION FOR SEQUENTIAL CIRCUITS-VERILOG......Page 280 5-10 CHAPTER SUMMARY......Page 286 REFERENCES......Page 287 PROBLEMS......Page 288 6-1 THE DESIGN SPACE......Page 303 6-2 GATE PROPAGATION DELAY......Page 312 6-3 FLIP-FLOP TIMING......Page 314 6-4 SEQUENTIAL CIRCUIT TIMING......Page 316 6-5 ASYNCHRONOUS INTERACTIONS......Page 318 6-6 SYNCHRONIZATION AND METASTABILITY......Page 320 6-7 SYNCHRONOUS CIRCUIT PITFALLS......Page 326 6-8 PROGRAMMABLE IMPLEMENTATION TECHNOLOGIES......Page 327 REFERENCES......Page 337 PROBLEMS......Page 338 Chapter 7. Registers and Register Transfers......Page 343 7-1 REGISTERS AND LOAD ENABLE......Page 344 7-2 REGISTER TRANSFERS......Page 347 7-3 REGISTER TRANSFER OPERATIONS......Page 349 7-5 MICROOPERATIONS......Page 352 7-6 MICROOPERATIONS ON A SINGLE REGISTER......Page 358 7-7 REGISTER-CELL DESIGN......Page 374 7-8 MULTIPLEXER AND Bus-BASED TRANSFERS FORMULTIPLE REGISTERS......Page 380 7-9 SERIAL TRANSFER AND MICROOPERATIONS......Page 383 7-10 CONTROL OF REGISTER TRANSFERS......Page 386 7-11 HDL REPRESENTATION FOR SHIFT REGISTERS ANDCOUNTERS-VHDL......Page 403 7-12 HDL REPRESENTATION FOR SHIFT REGISTERS ANDCOUNTERS-VERILOG......Page 406 7-13 MICROPROGRAMMED CONTROL......Page 407 PROBLEMS......Page 410 8-1 MEMORY DEFINITIONS......Page 421 8-2 RANDOM-ACCESS MEMORY......Page 422 8-3 SRAM INTEGRATED CIRCUITS......Page 427 8-4 ARRAY OF SRAM ICs......Page 433 8-5 DRAM ICs......Page 437 8-6 DRAM TYPES......Page 443 8-7 ARRA.vs OF DYNAMIC RAM ICs......Page 448 PROBLEMS......Page 449 Chapter 9. Computer Design Basics......Page 451 9-2 DATAPATHS......Page 452 9-3 THE ARITHMETIC/LOGIC UNIT......Page 455 9-4 THE SHIFTER......Page 461 9-5 DATAPATH REPRESENTATION......Page 463 9-6 THE CONTROL WORD......Page 466 9-7 A SIMPLE COMPUTER ARCHITECTURE......Page 472 9-8 SINGLE-CYCLE HARDWIRED CONTROL......Page 479 9-9 MULTIPLE-CYCLE HARDWIRED CONTROL......Page 486 9-10 CHAPTER SUMMARY......Page 497 PROBLEMS......Page 498 10-1 COMPUTER ARCHITECTURE CONCEPTS......Page 505 10-2 OPERAND ADDRESSING......Page 507 10-3 ADDRESSING MODES......Page 514 10-4 INSTRUCTION SET ARCHITECTURES......Page 521 10-5 DATA-TRANSFER INSTRUCTIONS......Page 522 10-6 DATA-MANIPULATION INSTRUCTIONS......Page 526 10-7 FLOATING-POINT COMPUTATIONS......Page 530 10-8 PROGRAM CONTROL INSTRUCTIONS......Page 535 10-9 PROGRAM INTERRUPT......Page 539 10-10 CHAPTER SUMMARY......Page 543 REFERENCES......Page 544 PROBLEMS......Page 545 Chapter 11. RISC and CISC Central Processing Units......Page 551 11-1 PIPELINED DATAPATH......Page 552 11-2 PIPELINED CONTROL......Page 557 11-3 THE REDUCED INSTRUCTION SET COMPUTER......Page 561 11-4 THE COMPLEX INSTRUCTION SET COMPUTER......Page 582 11-5 MORE ON DESIGN......Page 594 11-6 CHAPTER SUMMARY......Page 600 PROBLEMS......Page 601 12-1 COMPUTER 1/0......Page 605 12-2 SAMPLE PERIPHERALS......Page 606 12-3 1/0 INTERFACES......Page 612 12-4 SERIAL COMMUNICATION......Page 619 12-5 MODES OF TRANSFER......Page 625 12-6 PRIORITY INTERRUPT......Page 628 12-7 DIRECT MEMORY ACCESS......Page 632 REFERENCES......Page 636 PROBLEMS......Page 637 13-1 MEMORY HIERARCHY......Page 641 13-2 LOCALITY OF REFERENCE......Page 644 13-3 CACHE MEMORY......Page 646 13-4 VIRTUAL MEMORY......Page 660 13-5 CHAPTER SUMMARY......Page 666 PROBLEMS......Page 667 Index......Page 671 Cover 2 Preface 2 Chapter 1. Digital Systems and Information 11 1-1 INFORMATION REPRESENTATION 12 1-2 NUMBER SYSTEMS 21 1-3 ARITHMETIC OPERATIONS 26 1-4 DECIMAL CODES 31 1-5 ALPHANUMERIC CODES 33 1-6 GRAY CODES 36 1-7 CHAPTER SUMMARY 39 REFERENCES 39 PROBLEMS 39 Chapter 2. Combinational Logic Circuits 43 2-1 BINARY LOGIC AND GATES 43 2-2 BOOLEAN ALGEBRA 47 2-3 STANDARD FORMS 56 2-4 Two-LEVEL CIRCUIT OPTIMIZATION 62 2-5 MAP MANIPULATION 73 2-6 PRAGMATIC Two-LEVEL OPTIMIZATION 80 2-7 MULTIPLE-LEVEL CIRCUIT OPTIMIZATION 84 2-8 OTHER GATE TYPES 89 2-9 EXCLUSIVE-OR OPERATOR AND GATES 93 2-10 HIGH-IMPEDANCE OUTPUTS 96 2-11 CHAPTER SUMMARY 98 REFERENCES 98 PROBLEMS 99 Chapter 3. Combinational Logic Design 105 3-1 DESIGN PROCEDURE 105 3-2 BEGINNING HIERARCHICAL DESIGN 112 3-3 TECHNOLOGY MAPPING 115 3-4 VERIFICATION 119 3-5 COMBINATIONAL FUNCTIONAL BLOCKS 121 3-6 RUDIMENTARY LOGIC FUNCTIONS 123 3-7 DECODING 129 3-8 ENCODING 135 3-9 SELECTING 139 3-10 CHAPTER SUMMARY 146 REFERENCES 148 PROBLEMS 148 Chapter 4. Arithmetic Functions and HDLs 157 4-1 ITERATIVE COMBINATIONAL CIRCUITS 158 4-2 BINARY ADDERS 159 4-3 BINARY SUBTRACTION 163 4-4 BINARY ADDER-SUBTRACTORS 167 4-5 OTHER ARITHMETIC FUNCTIONS 175 4-6 HARDWARE DESCRIPTION LANGUAGES 181 4-7 HDL REPRESENTATIONS-VHDL 184 4-8 HDL REPRESENTATIONS-VERILOG 195 4-9 CHAPTER SUMMARY 204 REFERENCES 204 PROBLEMS 205 Chapter 5. Sequential Circuits 215 5-1 SEQUENTIAL CIRCUIT DEFINITIONS 216 5-2 LATCHES 218 5-3 FLIP-FLOPS 223 5-4 SEQUENTIAL CIRCUIT ANALYSIS 230 5-5 SEQUENTIAL CIRCUIT DESIGN 238 5-6 OTHER FLIP-FLOP TYPES 255 5-7 STATE-MACHINE DIAGRAMS AND APPLICATIONS 258 5-8 HDL REPRESENTATION FOR SEQUENTIAL CIRCUITS-VHDL 272 5-9 HDL REPRESENTATION FOR SEQUENTIAL CIRCUITS-VERILOG 280 5-10 CHAPTER SUMMARY 286 REFERENCES 287 PROBLEMS 288 Chapter 6. Selected Design Topics 303 6-1 THE DESIGN SPACE 303 6-2 GATE PROPAGATION DELAY 312 6-3 FLIP-FLOP TIMING 314 6-4 SEQUENTIAL CIRCUIT TIMING 316 6-5 ASYNCHRONOUS INTERACTIONS 318 6-6 SYNCHRONIZATION AND METASTABILITY 320 6-7 SYNCHRONOUS CIRCUIT PITFALLS 326 6-8 PROGRAMMABLE IMPLEMENTATION TECHNOLOGIES 327 6-9 CHAPTER SUMMARY 337 REFERENCES 337 PROBLEMS 338 Chapter 7. Registers and Register Transfers 343 7-1 REGISTERS AND LOAD ENABLE 344 7-2 REGISTER TRANSFERS 347 7-3 REGISTER TRANSFER OPERATIONS 349 7-4 A NOTE FOR VHDL AND VERILOG USERS ONLY 352 7-5 MICROOPERATIONS 352 7-6 MICROOPERATIONS ON A SINGLE REGISTER 358 7-7 REGISTER-CELL DESIGN 374 7-8 MULTIPLEXER AND Bus-BASED TRANSFERS FORMULTIPLE REGISTERS 380 7-9 SERIAL TRANSFER AND MICROOPERATIONS 383 7-10 CONTROL OF REGISTER TRANSFERS 386 7-11 HDL REPRESENTATION FOR SHIFT REGISTERS ANDCOUNTERS-VHDL 403 7-12 HDL REPRESENTATION FOR SHIFT REGISTERS ANDCOUNTERS-VERILOG 406 7-13 MICROPROGRAMMED CONTROL 407 7-14 CHAPTER SUMMARY 410 REFERENCES 410 PROBLEMS 410 Chapter 8. Memory Basics 421 8-1 MEMORY DEFINITIONS 421 8-2 RANDOM-ACCESS MEMORY 422 8-3 SRAM INTEGRATED CIRCUITS 427 8-4 ARRAY OF SRAM ICs 433 8-5 DRAM ICs 437 8-6 DRAM TYPES 443 8-7 ARRA.vs OF DYNAMIC RAM ICs 448 8-8 CHAPTER SUMMARY 449 REFERENCES 449 PROBLEMS 449 Chapter 9. Computer Design Basics 451 9-1 INTRODUCTION 452 9-2 DATAPATHS 452 9-3 THE ARITHMETIC/LOGIC UNIT 455 9-4 THE SHIFTER 461 9-5 DATAPATH REPRESENTATION 463 9-6 THE CONTROL WORD 466 9-7 A SIMPLE COMPUTER ARCHITECTURE 472 9-8 SINGLE-CYCLE HARDWIRED CONTROL 479 9-9 MULTIPLE-CYCLE HARDWIRED CONTROL 486 9-10 CHAPTER SUMMARY 497 REFERENCES 498 PROBLEMS 498 Chapter 10. Instruction Set Architecture 505 10-1 COMPUTER ARCHITECTURE CONCEPTS 505 10-2 OPERAND ADDRESSING 507 10-3 ADDRESSING MODES 514 10-4 INSTRUCTION SET ARCHITECTURES 521 10-5 DATA-TRANSFER INSTRUCTIONS 522 10-6 DATA-MANIPULATION INSTRUCTIONS 526 10-7 FLOATING-POINT COMPUTATIONS 530 10-8 PROGRAM CONTROL INSTRUCTIONS 535 10-9 PROGRAM INTERRUPT 539 10-10 CHAPTER SUMMARY 543 REFERENCES 544 PROBLEMS 545 Chapter 11. RISC and CISC Central Processing Units 551 11-1 PIPELINED DATAPATH 552 11-2 PIPELINED CONTROL 557 11-3 THE REDUCED INSTRUCTION SET COMPUTER 561 11-4 THE COMPLEX INSTRUCTION SET COMPUTER 582 11-5 MORE ON DESIGN 594 11-6 CHAPTER SUMMARY 600 REFERENCES 601 PROBLEMS 601 Chapter 12. Input–Output and Communication 605 12-1 COMPUTER 1/0 605 12-2 SAMPLE PERIPHERALS 606 12-3 1/0 INTERFACES 612 12-4 SERIAL COMMUNICATION 619 12-5 MODES OF TRANSFER 625 12-6 PRIORITY INTERRUPT 628 12-7 DIRECT MEMORY ACCESS 632 12-8 CHAPTER SUMMARY 636 REFERENCES 636 PROBLEMS 637 Chapter 13. Memory Systems 641 13-1 MEMORY HIERARCHY 641 13-2 LOCALITY OF REFERENCE 644 13-3 CACHE MEMORY 646 13-4 VIRTUAL MEMORY 660 13-5 CHAPTER SUMMARY 666 REFERENCES 667 PROBLEMS 667 Index 671 Featuring A Strong Emphasis On The Fundamentals Underlying Contemporary Logic Design Using Hardware Description Languages, Synthesis, And Verification, This Book Focuses On The Ever-evolving Applications Of Basic Computer Design Concepts With Strong Connections To Real-world Technology. 1. Digital Systems And Information -- 2. Combinational Logic Circuits -- 3. Combinational Logic Design -- 4. Arithmetic Functions And Hdls -- 5. Sequential Circuits -- 6. Selected Design Topics -- 7. Registers And Register Transfers -- 8. Memory Basics -- 9. Computer Design Basics -- 10. Instruction Set Architecture -- 11. Risc And Cisc Processors -- 12. Input-output And Communication -- 13. Memory Systems. M. Morris Mano, Charles R. Kime. Previous Ed.: 2006. Includes Bibliographical References And Index.