Multiprocessor System-on-Chip : Hardware Design and Tool Integration

Improving future electronic system performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications. FPGA-based accelerators not only offer the opportunity to speed up an application by implementing their compute-intensive kernels into hardware, but also to adapt to the dynamical behavior of an application. This book describes strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools are discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design. This book deals with key issues such as on-chip communication architectures, integration of reconfigurable hardware, and physical design of multiprocessor systems. •Provides a state-of-the-art overview of system design using MPSoC architectures; •Describes current trends in on-chip communication architectures; •Offers extensive coverage of system design integrating MPSoC architectures with reconfigurable hardware; •Includes coverage of challenges in physical design for multi- and manycore hardware architectures. Front Matter....Pages i-viii An Introduction to Multi-Core System on Chip – Trends and Challenges....Pages 1-21 Front Matter....Pages 23-23 Composability and Predictability for Independent Application Development,Verification, and Execution....Pages 25-56 Hardware Support for Efficient Resource Utilization in Manycore Processor Systems....Pages 57-87 PALLAS: Mapping Applications onto Manycore....Pages 89-113 The Case for Message Passing on Many-Core Chips....Pages 115-123 Front Matter....Pages 125-125 Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support....Pages 127-151 Front Matter....Pages 153-153 Design Tools and Methods for Chip Physical Design....Pages 155-166 Power‐Aware Multicore SoC and NoC Design....Pages 167-193 Front Matter....Pages 195-195 Embedded Multicore Systems: Design Challenges and Opportunities....Pages 197-222 High-Performance Multiprocessor System on Chip: Trends in Chip Architecture for the Mass Market....Pages 223-239 Invasive Computing: An Overview....Pages 241-268 Back Matter....Pages 269-270 The purpose of this book is to evaluate strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools will be discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design.