Intel© Xeon Phi(Tm) coprocessor architecture and tools : the guide for application developers

Intel® Xeon PhiTM Coprocessor Architecture and Tools: The Guide for Application Developers provides developers a comprehensive introduction and in-depth look at the Intel Xeon Phi coprocessor architecture and the corresponding parallel data structure tools and algorithms used in the various technical computing applications for which it is suitable. It also examines the source code-level optimizations that can be performed to exploit the powerful features of the processor. Xeon Phi is at the heart of world's fastest commercial supercomputer, which thanks to the massively parallel computing capabilities of Intel Xeon Phi processors coupled with Xeon Phi coprocessors attained 33.86 teraflops of benchmark performance in 2013. Extracting such stellar performance in real-world applications requires a sophisticated understanding of the complex interaction among hardware components, Xeon Phi cores, and the applications running on them. In this book, Rezaur Rahman, an Intel leader in the development of the Xeon Phi coprocessor and the optimization of its applications, presents and details all the features of Xeon Phi core design that are relevant to the practice of application developers, such as its vector units, hardware multithreading, cache hierarchy, and host-to-coprocessor communication channels. Building on this foundation, he shows developers how to solve real-world technical computing problems by selecting, deploying, and optimizing the available algorithms and data structure alternatives matching Xeon Phi's hardware characteristics. From Rahman's practical descriptions and extensive code examples, the reader will gain a working knowledge of the Xeon Phi vector instruction set and the Xeon Phi microarchitecture whereby cores execute 512-bit instruction streams in parallel. Front Matter....Pages i-xxi Front Matter....Pages 1-1 Introduction to Xeon Phi Architecture....Pages 3-14 Programming Xeon Phi....Pages 15-30 Xeon Phi Vector Architecture and Instruction Set....Pages 31-48 Xeon Phi Core Microarchitecture....Pages 49-64 Xeon Phi Cache and Memory Subsystem....Pages 65-80 Xeon Phi PCIe Bus Data Transfer and Power Management....Pages 81-94 Front Matter....Pages 95-95 Xeon Phi System Software....Pages 97-112 Xeon Phi Application Development Tools....Pages 113-136 Front Matter....Pages 137-137 Xeon Phi Application Design and Implementation Considerations....Pages 139-152 Application Performance Tuning on Xeon Phi....Pages 153-170 Algorithm and Data Structures for Xeon Phi....Pages 171-184 Xeon Phi Application Development on Windows OS....Pages 185-194 OpenCL on Xeon Phi....Pages 195-198 Virtual Shared Memory Programming on Xeon Phi....Pages 199-202 Back Matter....Pages 203-209