3D Integration for VLSI Systems

Three-dimensional (3D) integration is identified as a possible avenue for continuous performance growth in integrated circuits (IC) as the conventional scaling approach is faced with unprecedented challenges in fundamental and economic limits. Wafer level 3D IC can take several forms, and they usually include a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV.There is a long string of benefits that one can derive from 3D IC implementation such as form factor, density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. This book presents contributions by key researchers in this field, covering motivations, technology platforms, applications, and other design issues. Content: 3D Integration Technology - Introduction and OverviewChuan Seng Tan, Kuan-Neng Chen and Steven J. KoesterA Systems Perspective on 3D Integration: What is 3D? And What is 3D Good For?Phil Emma and Eren KursunWafer Bonding TechniquesBioh Kim, Thorsten Matthias, Viorel Dragoi, Markus Wimplinger and Paul LindnerTSV EtchingPaul WerbanethTSV FillingArthur Keigler3D Technology Platform: Temporary Bonding and ReleaseMark Privett 3D Technology Platform: Wafer Thinning, Stress Relief, and Thin Wafer HandlingScott SullivanAdvanced Die-to-Wafer 3D Integration Platform: Self-Assembly TechnologyTakafumi Fukushima, Kang-Wook Lee, Tetsu Tanaka and Mitsumasa KoyanagiAdvanced Direct Bond TechnologyPaul EnquistSurface Modification Bonding at Low Temperature for Three-Dimensional Hetero-Integration Akitsu ShigetouThrough Silicon Via Implementation in CMOS Image Sensor ProductXavier Gagnard and Nicolas HotellierA 300-mm Wafer-Level Three-Dimensional Integration Scheme Using Tungsten Through- Silicon Via and Hybrid Cu-Adhesive Bonding Fei LiuPower Delivery in 3D IC Technology with a Stratum Having an Array of Monolithic DC-DC Point-of-Load (PoL) Converter CellsRon Rutman and Jian SunThermal-Aware 3D IC Designs Xiaoxia Wu, Yuan Xie and Vijaykirshnan Narayanan3D IC Design Automation Considering Dynamic Power and Thermal IntegrityHao Yu and Xiwei HuangOutlook Ya Lan Annotation Introducing three-dimensional (3-D) integration as a possible avenue for continuous performance growth in integrated circuits, this project is a response to the limits of the current technology. Wafer level 3-D IC, as this new product is called, can take several forms, but the equipment usually includes a stack of several thinned IC layers that are vertically bonded and interconnected by through silicon via TSV. The benefits of this new approach include density multiplication, improved delay and power, enhanced bandwidth, and heterogeneous integration. In addition, chapters from leadingresearchers comment on technology platforms, applications, and other design issues